1. Field of the Invention
The present invention relates to a high speed integrated circuit processor and method for performing modulo mathematics and, more particularly, to a multifunction processor and method for performing multiple modulo mathematic operations.
2. Description of Related Art
Data that is transferred over an interconnected computer network, such as the Internet, is susceptible to various forms of attack. These attacks may result in such things as loss of privacy, loss of data integrity, identity theft, denial of service, or any combination of these attacks. The ever-expanding popularity of the Internet for secure communications, e-commerce, and various other transactions, has led to the need to ensure communications over non-secure interconnected computer networks like the Internet are secure from such attacks.
Data that is transferred over non-secure networks, like the Internet, is protected from the above-noted attacks by encrypting at the data source, and then decrypting at the data destination. Numerous schemes have been developed and employed to provide such encryption/decryption functionality. Such schemes include the Diffie-Hellman Key Exchange, digital signature generation, and the RSA (Rivest-Sahmir-Adelman) Public Key cryptography. In these schemes, as well as other cryptographic schemes, modulo mathematics is integral to the implementation. Cryptographic algorithms, such as these, that use modulo mathematics are quite robust. However, as the size of the encryption/decryption keys used with these algorithms gets larger, the speed at which the algorithms encrypt/decrypt data decreases.
Thus, designers have sought to design various ways of increasing the speed at which these algorithms can process data, and specifically, have attempted to design devices that perform various modulo mathematic operations at higher and higher speeds. Unfortunately, each of these devices either uses complex control schemes, or is designed to perform only a single type of modulo mathematical operation. In particular, U.S. Pat. No. 6,085,210 is an example of a design that uses complex state machines to control exponentiation and multiplication. And U.S. Pat. No. 6,141,422 is an example of a design that can only perform a single modulo mathematical operation—modulo exponentiation.
Hence, there is a need in the art for a processor that is able to perform various modulo mathematic operations and implement the modulo mathematic operations using processing methods that are less complex than those now known and/or implemented.